Integrated circuit technology and complementary metal-oxide-silicon (CMOS) technology is ever pushed in the direction of higher performance and hence smaller transistor dimensions. Below about 65 nm FinFET technology is emerging as the technology to carry forward the pursuit of high performance circuits. At the high performance levels utilizing sub-65 nm dimensions, very fine tuning the drive strengths of transistors in integrated circuits becomes critical, however, no method presently exists for doing this for circuits made up of FinFETs because of the quantized nature of their structures. Thus, there is a need for fine tunable drive strength FinFETs and methods of fine-tuning the drive strength of FinFETs.